串行 NAND

串行 NAND

让设计超越低密度限制

我们的串行 NAND 闪存是成本最低、密度最高的串行外设接口 (SPI) 解决方案。它可以帮助改善性能、增加密度并可减少一个控制器或卡片插槽,简化 BOM。

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串行 NAND 解决方案,更高性能,更低成本

“嵌入式设计”已经渗入到市场上一些最炙手可热的产品中,其中包括智能或互动玩具、书籍和游戏,网络打印机和计算机外围设备,以及可实现反向兼容的 WiMAX 盒。过去,这些嵌入设计依赖串行外设接口 (SPI) NOR 闪存进行代码影射、数据存储或存储 BIOS 和固件。但随着嵌入式应用的不断发展,市场对高密度的需求日益增加,在众多串行闪存解决方案中,串行 NAND 设备具备最低的每兆成本,因而成为这些应用程序的理想之选。

串行 NAND 的密度是 SPI NOR 的四倍多,对于许多嵌入式设计来说,串行 NAND 是 NOR 的绝佳替代产品。在众多串行闪存解决方案中,串行 NAND 具备最低的每兆成本,因此该产品也是降低您的 BOM 成本的好方法。

串行 NAND 料件目录和文档

串行外设接口 (SPI)
美光的串行 NAND 闪存与广泛使用的四线 SPI 标准兼容。串行 NAND 符合广泛认可的业界标准,因此在很多应用中成为 SPI NOR 甚至并行 NOR 的替代品。SPI 提供串行时钟、串行数据输入、串行数据输出以及芯片选择管脚。

  • Low Cost-Per-Megabit With its smaller architecture, Serial NAND Flash is simply the least expensive SPI solution
  • 高密度 SPI: 串行 NAND 的最低密度为 1Gb,可提供利用 SPI 协议的最高密度
  • 误差校正片上误差校正码 (ECC) 让安装串行 NAND 变得简单并扩展了可能的应用范围。
  • 写入速度快:串行 NAND 具备最佳的 SPI 写入性能
使用 NAND 闪存软件优化您的设计
使用我们的 NAND 软件产品优化您的设计并减轻您的开发负担。我们与包括 HCC Embedded 以及 CMX Systems 在内的第三方供应商合作,提供串行 NAND 驱动和完整的 OS 系统,帮助您最大化地利用我们的存储产品。

进一步了解 NAND 软件

特点 优势
密度 1Gb–4Gb Provides density required to maximize system capabilities
Clock Frequency 50 MHz Faster write performance than serial NOR
Endurance (cycles) 100K High-endurance enables applications that require intensive program and erase operation while prolonging memory life
Temp Range -40˚C to +85˚C Wide temperature range is ideal for rugged environments
Voltage Vcc 2.7–3.6V Industry-standard voltage range
配置 x1 Industry-standard configuration enables easy system design
Package VFBGA Industry-standard packaging enables easier density migration
Interface Serial Interface Compatible with industry-standard SPI design set
ECC 可用 On-chip ECC resolves complications involved with handling raw NAND

Choosing the Right NAND
Weighing the advantage of each NAND Flash memory solution is important if you’re going to find the best possible device for your application.To help, we’ve developed a Choosing the Right NAND guide, which offers a basic overview of the various forms of NAND Flash memory available to system designers, enumerating the features and benefits of each.

View the guide

类型 安全 标题和描述 编号 更新日期 文件大小
NAND Flash Performance Increase : Customers using the PAGE READ CACHE MODE operation provided in Micron NAND Flash devices will realize significant performance gains in systems requiring increased data volume at a much faster rate. TN-29-01 2007/05 205.94 KB
Small Block vs. Large Block NAND Devices: Large-block NAND Flash devices offer significant performance increases over their small-block NAND Flash counterparts for READ, PROGRAM, and ERASE operations. TN-29-07 2007/05 387.87 KB
NAND Flash Security: Using Micron NAND Flash security features to implement component and code authentication security solutions, designers can protect critical system components and proprietary system software from unwanted attacks and alterations. TN-29-11 2007/05 189.32 KB
Monitoring Ready/Busy Status in 2, 4, and 8Gb Micron NAND Flash Devices: Four options for determining the NAND Flash ready/busy device status are presented with detailed explanations of each option. TN-29-13 2007/05 96.08 KB
NAND Flash Performance Increase with PROGRAM PAGE CACHE MODE Command: This technical note discusses the benefits of PROGRAM PAGE CACHE MODE operations over normal PROGRAM PAGE operations.It also provides specific timing examples and instructions for performing PROGRAM PAGE CACHE MODE operations.Rev. C TN-29-14 2010/02 266.14 KB
Boot-from-NAND Using Micron MT28F1G08ABA NAND Flash with the Texas Instruments OMAP 2420 Processor: Describes Boot-from-NAND using Micron MT29F1G08ABA NAND Flash with the Texas Instruments OMAP 2420 processor. TN-29-16 2007/06 435.55 KB
Booting from Embedded MMC: Describes booting from an embedded ARM processor in the MMC environment TN-29-18 2008/06 282.02 KB
NAND Flash 101 - An Introduction to NAND Flash and How to Design It In to Your Next Product: Provides an introduction to NAND Flash and how to design it into your next product.Rev. B TN-29-19 2010/04 968.5 KB
Improving NAND Flash Performance Using Two-Plane Command Enabled Micron Devices: Describes the performance benefits of Micron two-plane commands, and provides implementation guidelines for making the best use of two-plane capabilities TN-29-25 2008/09 123.28 KB
NAND Flash Status Register Response in Cache Programming Operations: Describes status register responses when operating in cache programming modes TN-29-26 2007/06 253.71 KB
Memory Management in NAND Flash Arrays: Describes common NAND Flash memory-management methods for effective use of the NAND Flash memory array TN-29-28 2009/12 271.42 KB
Using COPYBACK Operations to Maintain Data Integrity in NAND Flash Devices: Describes how to use COPYBACK operations in NAND Flash devices TN-29-41 2008/10 101.39 KB
Wear-Leveling Techniques in NAND Flash Devices: Highlights the importance of wear leveling, explains two wear-leveling techniques, and discusses implementing wear leveling TN-29-42 2008/10 268.3 KB
NAND Flash Performance Improvement Using Internal Data Move: NAND data management capabilities and higher system performance through NAND Flash internal data moves TN-29-15 2010/03 219.17 KB
IBIS Behavioral Models: 美光多年前就已成为 IBIS 开放论坛的一员,完全支持 IBIS 规范。美光的网站上提供其大部分产品的 IBIS 模型以供下载。 TN-00-07 2009/11 163.98 KB
Thermal Applications: 定义了测量和确保美光零件和模块不超过允许的最高温度的一般方法和标准 TN-00-08 2010/05 252.18 KB
Understanding Quality and Reliability Requirements for Bare Die Applications: 介绍了 Bare Die 应用的质量和可靠性要求 TN-00-14 2009/10 152.83 KB
Recommended Soldering Parameters: 定义了美光科技公司产品的推荐连接技术和参数。 TN-00-15 2007/03 69.09 KB
Uprating of Semiconductors for High-Temperature Applications: 描述了与提升温度有关的问题,以及在制造环境规范之外使用零件和/或系统的相关风险 TN-00-18 2010/05 428.33 KB
Understanding Signal Integrity: 描述了从新产品构思直至产品寿命结束的整个过程中,如何发挥内存设计、测试和验证工具的最大优势 TN-00-20 2009/12 1.52 MB
SEMI Wafer Map Format: 美光采用了经国际半导体设备与材料联盟 (SEMI) 批准的晶圆图文件格式。使用 SEMI 的格式,美光的客户可以放心,因为他们将始终收到规格统一、兼容、可靠的晶圆图文件。 TN-00-21 2009/02 110 KB
Thinning Considerations for Wafer Products: 有关优化晶圆薄化工艺以满足特定客户需求的信息 TN-00-19 2009/10 73.58 KB
Next-Generation NAND Flash Part Numbering System: Part numbering guide for Micron Next-Generation NAND Flash products. 2009/08 35.73 KB
Small Page SLC (128Mb - 1Gb): NAND Flash Software driver 2009/11 9.59 KB
Standard NAND Flash Part Numbering System: Part numbering guide for Micron Standard NAND Flash products. 2009/02 28.52 KB
Flash Memory Technology Direction: This paper explains the trade-offs associated with available disk caching methods, the differences between various types of Flash memory, and the advantages that NAND offers when superior performance is critically important. White Paper 2009/12 643.16 KB
PCN/EOL Systems: 介绍了美光产品的变更通知和寿命终结系统。 CSN-12 2012/04 79.21 KB
Wafer Packaging and Packaging Materials: 提供了有关装运美光产品时使用的各种材料的完整装运和回收信息。 CSN-20 2011/09 776.24 KB
Bare Die SiPs and MCMs: 描述了 Bare Die SiP 和 MCM 的设计考虑因素。 CSN-18 2009/04 151.06 KB
Shipping Quantities: 提供了料件数量表格。 CSN-04 2012/04 472.27 KB
Micron KGD Definitions: 描述了美光 KGD-C1 和 KGD-C2 DRAM 芯片的测试规格和参数 CSN-22 2009/07 65.52 KB
Micron Component and Module Packaging: 解释了美光的封装标签和程序。 CSN-16 2012/02 887.13 KB
ESD Precautions for Die/Wafer Handling and Assembly: 介绍了在工作场所中控制 ESD 的好处,包括提高产量和改善质量与可靠性,最终可以缩减制造成本。 CSN-24 2010/08 119.08 KB
Electronic Data Interchange: 描述了 EDI 传输的装置、协议和联系方式。 CSN-06 2005/09 53.5 KB
RMA Procedures for Packaged Product and Bare Die Devices: 概括介绍了标准的退货授权 (RMA) 程序,以及与 bare die RMA 的对比。 CSN-07 2010/10 82.64 KB
ISO System Management Standards: 描述了 ISO 系统管理标准。 CSN-08 2004/04 39.18 KB
ONFI Standards and What They Mean to Designers: Inconsistencies without ONFI and results with ONFI 2009/12 166.18 KB
Optimizing NAND Flash Performance: Improving NAND performance in various applications 2009/12 149.28 KB
A Closer Look at NAND Flash: Exploring the possibilities of SSDs 2009/12 2.7 MB
The Inconvenient Truths of NAND Flash Memory: Overview of NAND Flash 2009/12 344.36 KB
Overcoming (or Embracing) the Dreaded Single-Source Dilemma: Multisourcing versus single-sourcing 2009/12 241.11 KB
NAND Flash Reliability and Performance - The Software Effect: NAND software 2009/12 296.15 KB
Introduction to Flash Memory: Basics of Flash memory 2009/12 1.11 MB
Power Requirements for Multi-Bit Per Cell NAND Flash: Technology differences, power consumption considerations 2009/12 90.65 KB
3-Bit/Cell NAND Flash: Architecture, performance, endurance, system requirements, cost advantages, applications 2009/12 90.87 KB
NAND Flash Consideratons for Consumer Applications: NAND requirements/system reliability in consumer applications 2009/12 700.54 KB
Improving Power Budgeting Estimates in NAND Applications: Measuring Icc with better predictability 2009/12 694.29 KB
The Many Flavors of NAND...and More to Come: Keynote for Flash Memory Summit 2009 2009/12 8.03 MB
NAND Flash Architecture and Specification Trends: How to prepare for changes brought on by technology shrinks 2009/12 696.58 KB
An ONFI Update: Overview of enhancements and the path to higher performance 2009/12 1,007.42 KB
Choosing the Right NAND for Your Application: Market overview, traditional versus newer devices, and Micron's broad product offering 2009/12 2.72 MB
Micron® ECC Module for NAND Flash via Xilinx® Spartanâ„¢-3 FPGA: Micron® ECC module was developed and tested using Xilinx® Spartanâ„¢-3 and can be ported to certain other platforms of the user’s choosing. TN-29-05 2007/05 997.75 KB
Micron® NAND Flash Controller via Xilinx® Spartanâ„¢-3 FPGA: Describes the Micron NAND Flash controller, techniques for interfacing the NAND Flash device with a processor, and use of the Micron glueless interface to interface a processor with NAND Flash memory. TN-29-06 2007/06 872.4 KB
ONFI 2.0:High Speed NAND Overview: Discusses the limitations of the NAND interface and how ONFI 2.0 helps overcome performance limitations and provide greater scalability.Presented by Applications Engineering Manager and ONFI Technical Team Member, Michael Abraham. 2007/11 158.84 KB
TN-29-37:Comparing 40 and 50-Series SLC NAND Flash Devices: Prior to conversion, Micron recommends that the target design take into account the product data sheet and the specific changes highlighted in this technical note.This Technical note covers the M58A, M59A & M50A products. TN-29-37 2009/01 728.87 KB
FBGA Date Codes: FBGA 封装零件的日期代码 2005/08 22.36 KB
Moisture Absorption in Plastic Packages: Describes shipping procedures for preventing memory devices from absorbing moisture and recommendations for baking devices exposed to excessive moisture TN-00-01 2010/02 87.26 KB
NAND Flash Controller on Spartan-3: This technical note describes the Micron NAND Flash controller, techniques for interfacing the NAND Flash device with a processor and use of the Micron glueless interface to interface a processor with NAND Flash memory. TN-29-06 2007/06 872.4 KB
ECC Module for Xilinx Spartan-3: Describes the Micron® ECC module that was developed and tested using Xilinx® Spartanâ„¢-3 and can be ported to certain other platforms of the user’s choosing. TN-29-05 2007/05 997.75 KB
Accelerate Design Cycles with Simulation Models: 美光会提供必要的工具和指导,以在实际布局前对新设计进行检验。此技术要点讨论了软件模型支持、信号保真性优化和逻辑电路设计。 TN-00-09 2010/02 206.91 KB
Determining NAND Flash Ready/Busy Status: Systems that utilize NAND Flash memory can use either the ready/busy pin or the status register to determine whether a Micron® NAND Flash device is busy or ready to accept a new command.This technical note addresses the use of status register bit 5, which indicates the ready/busy status of the NAND Flash device. TN-29-13 2010/02 136.48 KB
1-Bit Software ECC: NAND Flash software driver ECC 2009/12 3.26 KB
TN-29-51:Migrating from 50-Series to 60-Series SLC NAND Flash Devices: Migrating from 50-Series to 60-Series SLC NAND Flash Devices; M58A, M59A, M50A, M68A, M69A, M60A TN-29-51 2011/05 121.59 KB
TN-29-52:Migrating 1Gb 48nm and 2Gb/4Gb 57nm SLC NAND Flash Memory to 34nm: Provides guidelines for migrating 1Gb 48nm and 2Gb/4Gb 57nm SLC, large-page NAND Flash memory to 34nm technology (M60A, M69A & M68A) TN-29-52 2010/10 180.46 KB
TN-29-17:NAND Flash Design and Use Considerations: Describes design and use considerations for NAND Flash memory, focusing on bad-block identification and error correction. TN-29-17 2010/09 226.04 KB
Migrating from a Chip Enable Care to a Don't Care NAND Flash Memory: The purpose of this application note is to highlight the differences between Chip Enable don’t care and Chip Enable care devices. AN2365 2010/10 265.78 KB
Micron Wire-Bonding Techniques: 此技术要点提供了丝焊技术的指导,可用于美光产品的镍钯 (NiPd) 和铝制接合焊盘。 TN-00-22 2010/11 66.13 KB
Flash + Controller Part Numbering System 2012/03 27.98 KB
How ClearNAND Flash Simplifies and Enhances System Designs: Discusses NAND Flash trends and complexities; NAND interface choices; and how Micron's Enhanced ClearNAND Flash helps eliminate the impact of NAND's ever-increasing ECC requirements. White Paper 2011/07 814.8 KB
Micron BGA Manufacturer's User Guide: 提供相关信息,帮助顾客轻松将最前沿的和传统的美光球栅阵列 (BGA) 封装整合到制造流程中。此指南旨在提供一系列高水平指导,并附有参考手册,其中介绍了封装相关和制造工艺流程的典型做法。 CSN-33 2011/07 353.32 KB
System Benefits of EZ-NAND/Enhanced ClearNAND Flash 2011/08 1.77 MB
FMS2011 Keynote 2011/08 2.41 MB
Current and Emerging Memory Technology Landscape 2011/08 2.78 MB
NAND Flash Comparisons for Mobile 2011/08 4.84 MB
Looking Ahead at Flash Memory 2011/08 6.43 MB
400 MT/s NAND Interface Solutions 2011/08 2 MB
Physical NAND Flash Security 2011/08 2.32 MB
NAND 201:An Update on the Continued Evolution of NAND Flash: Chronicles the developments in NAND technology from 2006 through early 2011. White Paper 2011/09 641.28 KB
NAND 霍勒斯二进制代码软件 2010/02 132.93 KB
Large Page SLC (1Gb, 4Gb): NAND Flash Software driver 2010/01 17.27 KB
Product Marks/Product and Packaging Labels: 介绍了产品料件的标记,以及产品和封装的标签。 CSN-11 2012/04 724.89 KB
Optimize your system designs using Flash memory 2012/04 6.18 MB
Industrial and Multi-Market Applications Flyer: 我们拥有广泛而稳定的 IMM 式存储解决方案,有助于推动汽车、工业、医疗、制造业和其它多类细分市场的技术发展。 产品宣传页 2011/08 593.95 KB
Compatibility Guide for Micron Software Device Drivers Available on micron.com: This document lists the compatible NOR, NAND, and PCM devices for the software device drivers available for download from micron.com. 产品宣传页 2012/02 227.69 KB
NAND Choices Flyer: A quick look at choosing the right NAND solution for your design needs 2010/08 141.94 KB
NAND Flash Flyer: Describes why Micron NAND is the best fit for your applications 2010/08 145.74 KB
NAND Flash Low Level Drivers for x16 Devices 2010/01 15.34 KB
Very Large Page SLC (8Gb): NAND Flash Software driver 2010/03 10.23 KB
On-Die ECC NAND Flash Flyer: With four times or more th density of NOR, On-Die EC NAND is a great alternative to NOR for many embedded designs. 2010/03 173.52 KB
ONFI Flyer 2009/06 162.55 KB
Serial NAND Flash Memory Flyer: Discusses advantages of Serial NAND Flash memory for embedded designs 2009/07 204.25 KB
BeagleBoard SPI NAND MTD for Linux 2.6.33: SPI NAND GPL drivers for 50 series NAND. 2011/06 9.65 KB
Bypass Capacitor Selection for High-Speed Designs: 描述了高速设计的旁路电容选择。 TN-00-06 2011/03 481.9 KB
Enabling a Flash Memory Device into the Linux MTD: The technical note introduces the Linux memory technology device (MTD) architecture and provides a basis for understanding how to enable new devices and new features into the Linux MTD. TN-00-25 2011/05 528.81 KB
Software Device Drivers for M28W640C Parallel NOR Flash Memory: This technical note describes the library source code in C for Micron's M28W640C Parallel NOR Flash Memory devices. TN-13-18 2012/01 310.28 KB
Hamming Codes for NAND Flash Memories: Outlines hamming codes NAND Flash memory TN-29-08 2007/05 229.46 KB
TN-29-56:Enabling On-Die ECC for OMAP3 on Linux/Android OS: Enabling NAND On-Die ECC for OMAP3 Using Linux/Android OS with YAFFS2.M60A, M69A, M68A. TN-29-56 2010/12 331.14 KB
TN-29-57:Migrating from 50-Series to 60-Series SPI NAND: Supplements the product change notification (PCN) covering the transition from Micron® 50-series (50nm) to 60-series (34nm) single-level cell (SLC) SPI NAND Flash devices. TN-29-57 2011/05 164.87 KB
TN-29-58:ONFI NV-DDR2 Design Guide: Rev. A TN-29-58 2011/03 685.04 KB
Bad Block Management in NAND Flash Memory: This technical note explains how to recognize factory-generated bad blocks and manage bad blocks that develop during the lifetime of NAND Flash memory. TN-29-59 2010/10 317.81 KB
Garbage Collection in SLC NAND Flash Memory: This technical note describes the recommended garbage collection algorithm to be implemented in the Flash Translation Layer (FTL) software for single-level cell (SLC) NAND Flash memory devices. AN1821 2010/10 207.37 KB
Wear Leveling in NAND Flash Memory: This technical note describes the recommended wear leveling algorithm to be implemented in the FTL software for NAND Flash memory. TN-29-61 2010/10 213.59 KB
Software Device Drivers for Large Page Micron NAND Flash Memory Devices: This technical note explains how to use the Micron large page NAND Flash memory software device drivers. TN-29-62 2011/10 624.45 KB
Error Correction Code in SLC NAND Flash: This technical note describes how to implement error correction code (ECC) in Micron small page and large page single-level cell (SLC) NAND Flash memory that can detect 2-bit errors and correct 1-bit errors per 256 or 512 bytes. TN-29-63 2010/10 486.67 KB
Software Device Drivers for Small Page Micron NAND Flash Memory: This technical note explains how to use the Micron small page NAND Flash memory software drivers. TN-29-64 2010/10 889.73 KB
Software Device Drivers for Very Large Page Micron NAND Flash Memory: This technical note explains how to use the Micron very large page NAND Flash memory software device drivers. TN-29-65 2010/10 405.64 KB
Enabling Software BCH Error Correction Code (ECC) on a Linux Platform: This technical note addresses applications using existing 1-bit ECC processors to enable Micron MT29F1GxxABxDA, MT29F2GxxABxEA, MT29F4GxxABxDA, and MT29F1GXXABXEA NAND Flash memory devices with software BCH ECC. TN-29-71 2012/04 688.7 KB

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What NAND parts have been validated with the OMAP35x?
Micron works closely with Texas Instruments (TI) to validate and optimize our parts for the OMAP35x processors.As we work with the OMAP35x team, the list of validated memory devices expands frequently.For the most current information, contact your local Micron support.
When I issue a Read ID command (90h) to a two-die NAND device, I get a device ID back that states it is a one-die NAND device.
In a two-die NAND device, where a single die is on each CE#, the device ID that is returned is per CE# for one die.For example, an 8Gb two-die NAND device with two CE# pins would return a 4Gb device ID on each CE#.See the Read ID section of the NAND device data sheet for more details.
I’ve heard that NAND has too many errors to boot from.Is this true?
With ECC, NAND can achieve bit error rates (BER) that are comparable with NOR, which is commonly used as a booting device.Applications that use NAND typically copy the booting code to DRAM and execute from DRAM.For more information, read Tech Note 29-16, which is geared to a specific processor, but the concepts can be applied generally.TN-29-19 is a very useful technical note on the general concepts of NAND.
Should I be marking blocks bad due to READ errors?
是。
Where can I find additional technical information about Micron NAND devices that is not covered in the device data sheets?
Additional Micron NAND Flash technical information—including details on performance enhancing commands—can be found on the Technical Notes page for NAND.
Why doesn't the NAND Flash device respond correctly to commands issued to it?
Be sure you are issuing a reset command (FFh) to the NAND device after powering on the device.A reset command (FFh) must be issued to each valid chip enable (CE#) of the NAND device before any commands are allowed to be issued to that CE#.
Where can I find simulation models for NAND Flash devices?
Micron posts Verilog, HSPICE, and IBIS models for NAND devices.To find the right model for your needs, see the appropriate NAND part catalog and select your device to view the available models.
Why am I getting a bit/byte error reading back the information I programmed into the NAND device?
Check that you are using the appropriate amount of error correction code (ECC) for the NAND device.The ECC threshold can be found in the "Error Management" section of the NAND device data sheet.Also ensure that none of the bad blocks marked by the NAND manufacturer (Micron) are used.See the "Error Management" section of the NAND device data sheet for more details on how to search for manufacturer-marked bad blocks.
How do I achieve greater PROGRAM/READ throughput for the NAND device?
To get the maximum PROGRAM/READ throughput for Micron NAND Flash devices, use the PROGRAM and READ CACHE operations.See the NAND device data sheet and our NAND Technical Notes Page for details on how to use these commands.
Do you support small block devices?
Currently, Micron only offers large block devices.For more information, please refer to Technical Note, TN-29-07:Small Block vs. Large Block NAND Devices.
How is Nvb specified?
Nvb is specified as the minimum number of valid blocks at the end of the P/E cycle spec.
I am using the correct amount of error correction code (ECC) for the NAND device, but I’m still seeing bit/byte errors in data I read back from the NAND device.
Make sure that you are issuing a READ STATUS command to the NAND device after any type of PROGRAM or ERASE operation.Checking status after a PROGRAM or ERASE operation will report whether the PROGRAM or ERASE operation was successful.If the READ STATUS command reports a failure with a PROGRAM operation, that data should be programmed somewhere else and the block being programmed should be retired.If the READ STATUS command reports a failure with an ERASE operation, that block should also be retired.
How much ECC do I need to support your devices?
We define our ECC requirement per 512-byte section.MLC NAND devices have a higher ECC requirement than SLC NAND due to the increased number of bits per cell.ECC requirements differ for designs, so consult the device data sheet for the amount of ECC needed.
I am seeing a lot of READ DISTURB errors.Can you tell me if there is a problem with your part?
READ disturb occurs when the same data is read repeatedly.By its nature, NAND technology has a very low occurrence of read-disturb errors.But, to mitigate any errors received due to read disturb, we recommend that users refresh the data to reduce the amount of times the same data is read.